# DO-254 Coverage by Linty Rules |ID|Title|Automatable|Coverage (full / high / low / none)|Comments|Linty Rules| |:---:|:---|:---:|:---:|:---|:---| |**CP1**|Avoid Incorrect VHDL Type Usage|no|none|Synthesis during Linty analysis would fail | |**CP2**|Avoid Duplicate Signal Assignments|yes|none| | |**CP3**|Avoid Hard-Coded Numeric Values|yes|full| |[VHDL023: Hardcoded numeric values should be used only in "constant" or "generic"](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL023&rule_key=vhdl%3AVHDL023)

| |**CP4**|Avoid Hard-Coded Vector Assignment|yes|full| |[VHDL236: Vector assignments should not be hardcoded](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL236&rule_key=vhdl%3AVHDL236)

| |**CP5**|Ensure Consistent FSM State Encoding Style|yes|full| |[VHDL1005: FSM states should be encoded using enumerated type](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1005&rule_key=vhdl%3AVHDL1005)

| |**CP6**|Ensure Safe FSM Transitions|yes|low| |[VHDL1040: FSM number of states should equal its type number of states](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1040&rule_key=vhdl%3AVHDL1040)

| |**CP7**|Avoid Mismatching Ranges|yes|full| |[VHDL1066: Objects of different lengths should not be compared](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1066&rule_key=vhdl%3AVHDL1066)

| |**CP8**|Ensure Complete Sensitivity List|yes|full| |[VHDL1037: The sensitivity list of a process should be minimal](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1037&rule_key=vhdl%3AVHDL1037)

[VHDL1072: The sensitivity list of a process should be complete](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1072&rule_key=vhdl%3AVHDL1072)

| |**CP9**|Ensure Proper Sub-Program Body|yes|full| |[VHDL166: Recursive functions should not be used](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL166&rule_key=vhdl%3AVHDL166)

[VHDL1068: Functions should always return a value](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1068&rule_key=vhdl%3AVHDL1068)

[VHDL233: Synthesizable functions and procedures should not use external signals and variables](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL233&rule_key=vhdl%3AVHDL233)

| |**CP10**|Assign Value Before Using|yes|full| |[VHDL1069: Signals and variables should be assigned a value before being used](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1069&rule_key=vhdl%3AVHDL1069)

| |**CP11**|Avoid Unconnected Input Ports|yes|full| |[VHDL138: All output ports (and optionally all input ports) of a component should be mapped](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL138&rule_key=vhdl%3AVHDL138)

| |**CP12**|Avoid Unconnected Output Ports|yes|full| |[VHDL138: All output ports (and optionally all input ports) of a component should be mapped](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL138&rule_key=vhdl%3AVHDL138)

| |**CP13**|Declare Objects Before Use|no|none|Synthesis during Linty analysis would fail | |**CP14**|Avoid Unused Declarations|yes|full| |[VHDL134: All declared elements should be used in their corresponding scope](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL134&rule_key=vhdl%3AVHDL134)

[VHDL135: All declared parameters should be used in the corresponding function/procedure](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL135&rule_key=vhdl%3AVHDL135)

[VHDL1052: Unused generate blocks should be removed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1052&rule_key=vhdl%3AVHDL1052)

[VHDL1050: Unused entities should be removed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1050&rule_key=vhdl%3AVHDL1050)

[VHDL1051: Unused architectures should be removed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1051&rule_key=vhdl%3AVHDL1051)

| |**CDC1**|Analyze Multiple Asynchronous Clocks|yes|full| |[HDL1000: Track all clock domains](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1000&rule_key=hdl%3AHDL1000)

[HDL1001: All clock domain crossings (CDC) should be reviewed](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1001&rule_key=hdl%3AHDL1001)

| |**SS1**|Avoid Implied Logic|yes|low| |[VHDL224: Internal tristates should not be used](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL224&rule_key=vhdl%3AVHDL224)

| |**SS2**|Ensure Proper Case Statement Specification|yes|full|'Be complete' would be caught at synthesis step of Linty analysis |[VHDL1065: Choices should not overlap](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1065&rule_key=vhdl%3AVHDL1065)

[VHDL1064: Choices outside of range should be removed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1064&rule_key=vhdl%3AVHDL1064)

[VHDL003: Each case statement should define an "others" clause](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL003&rule_key=vhdl%3AVHDL003)

| |**SS3**|Avoid Combinational Feedback|yes|full| |[HDL1003: Combinational loops should be removed](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1003&rule_key=hdl%3AHDL1003)

| |**SS4**|Avoid Latch Inference|yes|full| |[HDL1043: Latches should be removed](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1043&rule_key=hdl%3AHDL1043)

[VHDL1036: "if" statements should always contain an "else" statement in combinational processes to avoid undesired latch inference](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1036&rule_key=vhdl%3AVHDL1036)

| |**SS5**|Avoid Multiple Waveforms|yes|full| |[VHDL235: Signal assignments should not contain multiple waveforms](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL235&rule_key=vhdl%3AVHDL235)

| |**SS6**|Avoid Multiple Drivers|yes|full| |[VHDL140: Concurrent assignments should be complete to avoid undesired latch inference](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL140&rule_key=vhdl%3AVHDL140)

[VHDL139: Signals and variables should not be assigned in multiple processes or equivalent concurrent assignments](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL139&rule_key=vhdl%3AVHDL139)

| |**SS7**|Avoid Uninitialized VHDL Deferred Constants|yes|full| |[VHDL155: All deferred constants should be initialized](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL155&rule_key=vhdl%3AVHDL155)

| |**SS8**|Avoid Clock Used as Data|yes|high| |[VHDL1012: Clock signals not used as clock of a flip-flop should be reviewed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1012&rule_key=vhdl%3AVHDL1012)

| |**SS9**|Avoid Shared Clock and Reset Signal|yes|high| |[VHDL1033: Reset signals not used as reset of a flip-flop should be reviewed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1033&rule_key=vhdl%3AVHDL1033)

[VHDL1012: Clock signals not used as clock of a flip-flop should be reviewed](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1012&rule_key=vhdl%3AVHDL1012)

| |**SS10**|Avoid Gated Clocks|yes|none| | |**SS11**|Avoid Internally Generated Clocks|yes|none| | |**SS12**|Avoid Internally Generated Resets|yes|none| | |**SS13**|Avoid Mixed Polarity Reset|yes|full| |[HDL1035: Active-high resets should be preferred over active-low resets](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1035&rule_key=hdl%3AHDL1035)

[HDL1036: Active-low resets should be preferred over active-high resets](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1036&rule_key=hdl%3AHDL1036)

| |**SS14**|Avoid Unresettable Registers|yes|none| | |**SS15**|Avoid Asynchronous Reset Release|yes|none| | |**SS16**|Avoid Initialization Assignments|yes|none| | |**SS17**|Avoid Undriven and Unused Logic|no|none| | |**SS18**|Ensure Register Controllability|yes|none| | |**SS19**|Avoid Snake Paths|yes|low| |[VHDL172: Conditional branching statements ("if", "case", "while" and "for" loops) should not be too deeply nested](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL172&rule_key=vhdl%3AVHDL172)

| |**SS20**|Ensure Nesting Limits|yes|full| |[VHDL172: Conditional branching statements ("if", "case", "while" and "for" loops) should not be too deeply nested](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL172&rule_key=vhdl%3AVHDL172)

| |**SS21**|Ensure Consistent Vector Order|yes|full| |[VHDL036: Vector direction in ranges should always be the same](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL036&rule_key=vhdl%3AVHDL036)

| |**DR1**|Use Statement Labels|yes|low| |[VHDL213: Processes should be identified by labels](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL213&rule_key=vhdl%3AVHDL213)

| |**DR2**|Avoid Mixed Case Naming for Differentiation|yes|full| |[VHDL136: All references should have the same case as the corresponding declarations](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL136&rule_key=vhdl%3AVHDL136)

| |**DR3**|Ensure Unique Name Spaces|yes|full| |[VHDL209: Type/Subtype names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL209&rule_key=vhdl%3AVHDL209)

[VHDL016: Signal names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL016&rule_key=vhdl%3AVHDL016)

[VHDL015: Constant names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL015&rule_key=vhdl%3AVHDL015)

[VHDL012: Function names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL012&rule_key=vhdl%3AVHDL012)

[VHDL007: Architecture names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL007&rule_key=vhdl%3AVHDL007)

[VHDL009: Entity names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL009&rule_key=vhdl%3AVHDL009)

[VHDL008: Configuration names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL008&rule_key=vhdl%3AVHDL008)

[VHDL234: Variable names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL234&rule_key=vhdl%3AVHDL234)

[VHDL199: Procedure names should be unique in a project](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL199&rule_key=vhdl%3AVHDL199)

| |**DR4**|Use Separate Declaration Style|yes|full| |[VHDL126: Multiple declarations should not be written on the same line](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL126&rule_key=vhdl%3AVHDL126)

| |**DR5**|Use Separate Statement Style|yes|full| |[VHDL161: Statements should be on separate lines](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL161&rule_key=vhdl%3AVHDL161)

| |**DR6**|Ensure Consistent Indentation|yes|low| |[VHDL210: Port clauses should be properly formatted](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL210&rule_key=vhdl%3AVHDL210)

| |**DR7**|Avoid Using Tabs|yes|full| |[HDL004: Tabulation characters should not be used](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL004&rule_key=hdl%3AHDL004)

| |**DR8**|Avoid Large Design Files|yes|full| |[VHDL033: Files should not have too many lines of code](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL033&rule_key=vhdl%3AVHDL033)

| |**DR9**|Ensure Consistent Signal Names Across Hierarchy|yes|none| | |**DR10**|Ensure Consistent File Header|yes|full| |[VHDL239: File header should match a template](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL239&rule_key=vhdl%3AVHDL239)

| |**DR11**|Ensure Sufficient Comment Density|yes|full| |[VHDL207: Processes should be commented](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL207&rule_key=vhdl%3AVHDL207)

[VHDL160: Declarations should be commented](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL160&rule_key=vhdl%3AVHDL160)

[VHDL307: Code should be properly commented](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL307&rule_key=vhdl%3AVHDL307)

| |**DR12**|Ensure Proper Placement of Comments|yes|full| |[VHDL194: Trailing comments should not be used](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL194&rule_key=vhdl%3AVHDL194)

| |**DR13**|Ensure Company Specific Naming Standards|yes|full| |[HDL1028: FSM state signal names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=hdl%3AHDL1028&rule_key=hdl%3AHDL1028)

[VHDL1026: Reset signal names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1026&rule_key=vhdl%3AVHDL1026)

[VHDL181: Alias names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL181&rule_key=vhdl%3AVHDL181)

[VHDL187: "for" generate statement labels should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL187&rule_key=vhdl%3AVHDL187)

[VHDL1035: Process labels should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1035&rule_key=vhdl%3AVHDL1035)

[VHDL171: Package names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL171&rule_key=vhdl%3AVHDL171)

[VHDL1009: Clock signal names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL1009&rule_key=vhdl%3AVHDL1009)

[VHDL309: "if" generate statement labels should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL309&rule_key=vhdl%3AVHDL309)

[VHDL310: "case" generate statement labels should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL310&rule_key=vhdl%3AVHDL310)

[VHDL131: Procedure names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL131&rule_key=vhdl%3AVHDL131)

[VHDL010: Entity names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL010&rule_key=vhdl%3AVHDL010)

[VHDL130: Function names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL130&rule_key=vhdl%3AVHDL130)

[VHDL005: Architecture names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL005&rule_key=vhdl%3AVHDL005)

[VHDL006: Configuration names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL006&rule_key=vhdl%3AVHDL006)

[VHDL120: Generic parameter names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL120&rule_key=vhdl%3AVHDL120)

[VHDL122: Type names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL122&rule_key=vhdl%3AVHDL122)

[VHDL121: Subtype names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL121&rule_key=vhdl%3AVHDL121)

[VHDL117: Constant names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL117&rule_key=vhdl%3AVHDL117)

[VHDL116: Variable names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL116&rule_key=vhdl%3AVHDL116)

[VHDL119: Signal names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL119&rule_key=vhdl%3AVHDL119)

[VHDL118: Port names should comply with a naming convention](https://demo.linty-services.com/coding_rules?open=vhdl%3AVHDL118&rule_key=vhdl%3AVHDL118)

|